1. Field of the Invention
This invention relates to a layout method, a layout apparatus, a layout program and a recording medium thereof, and more particularly to a layout method and a layout apparatus which enable the yield of LSIs to be improved by considering random errors in layout design, as well as a layout program and a recording medium thereof.
2. Description of the Related Art
As manufacturing processes of LSIs (semiconductor integrated circuit devices) have become finer, a decrease in the yield of LSIs caused by random errors has become a more serious problem. The random error results from “small contaminants (defects)” in a manufacturing process and shorts or opens wiring on a chip. The random error and system errors attributed to a defect in a manufacturing process are two major factors reducing the yield of LSIs manufactured.
In the conventional placement of cells and wires (layout design), the layout (or its optimization) is carried out on the basis of elements (hereinafter referred to as a cost) such as a wiring rate, timing, and crosstalk noise. The wiring rate is the rate of wiring completed by CAD. The timing is timings for the propagation of signals which are determined in view of a delay in propagation from element to element mainly dominated by a wiring length. Crosstalk noise is the effect of the capacitive coupling between the adjacent wires on their respective signal levels.
Thus, the layout design of LSIs or its optimization has not been carried out taking the random error as the cost of the layout design into consideration. As a result, even with layouts having exactly the same netlist for LSIs of the same circuit configuration, the yield of LSIs manufactured using the layouts may vary by at least 5%.
The random error is not considered in the layout design because it is caused by defects, so that where and how a random error occurs on a chip cannot be predicted. Thus, the random error in the layout design is not considered. Accordingly, even if an attempt is made to consider the random error, it has not been examined what index is used to reflect the random error in the layout design or how the index is reflected in the layout.